High density multichip package with interconnect structure and heatsink
US5182632A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 2, 1991 |
| Grant date | Jan 26, 1993 |
| Priority date | — |
| Expiry date | Dec 2, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package for multiple semiconductor integrated circuit chips uses an interconnect structure manufactured by semiconductor processing techniques to provide dense interconnections between chips and to input/output terminals. Chips are thermally connected to a Kovar or molybdenum heatsink. The interconnect structure is constructed by fabricating multiple layers of interconnect metallization on an optically flat glass (or other dielectric) surface patterned into lines and separated by smoothed glass dielectric. The metallization lines are interconnected by vias and lead to pads which are connected to chip pads and to exterior pins or wiring. An interconnect frame allows access to the chips and the interconnect structure to effect wire bonding of the chips to the metallization and provide sealable cavities for the chips. Elastomeric connectors extend through and are aligned by the frame to connect pads on the interconnect structure top to traces on a mother board to which the package is mounted. Chip bonding plates allow chips to be removed from the package and replaced when found defective.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.