Semiconductor integrated circuit device
US5194749A · kind A · utility
51Cited by
12References
37Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 19, 1992 |
| Grant date | Mar 16, 1993 |
| Priority date | — |
| Expiry date | Feb 19, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/904
Abstract
In a memory cell of SRAM of CMOS type, load MISFET having a polycrystalline silicon film as area of source, drain and channel is stacked on drive MISFET, and gate electrodes of the drive MISFET and the load MISFET are constituted by conductive films in different layers. Area of source and drain provided on the polycrystalline silicon film has an overlapped area with the gate electrode of the load MISFET.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.