Substrate interconnect allowing personalization using spot surface links
US5220490A · kind A · utility
49Cited by
23References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 25, 1990 |
| Grant date | Jun 15, 1993 |
| Priority date | — |
| Expiry date | Oct 25, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/175
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A customizable interconnect circuit wherein a universal substrate of minimum layers is completely customized by programmable conductive links placed only on the top layer of the substrate. The customizable circuit having high density of orthogonally placed X- and Y-conductors capable of interconnecting closely spaced large-scale integrated circuits or discrete electrical components. By utilizing a plurality of interconnect cells regularly spaced throughout a universal, fixed substrate, interconnect routing from overlying electrical components or integrated circuits can be more directly routed to target areas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.