Corrugated storage contact capacitor and method for forming a corrugated storage contact capacitor
US5240871A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 6, 1991 |
| Grant date | Aug 31, 1993 |
| Priority date | — |
| Expiry date | Sep 6, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/714
Abstract
A dynamic random access memory (DRAM) cell having a corrugated storage contact capacitor for enhancing capacitance. A noncritical alignment is effected between the substrate contact area and the lower capacitor plate by using an etch stop layer to protect wordlines, field-effect transistors (FETs), and field oxide regions during the patterning and etching of storage capacitor regions. The corrugated storage contact capacitor is fabricated by depositing alternating layers of dielectric materials having either substantially different etch rates or wet etch selectivity one toward the other. The layers are isotropically etched and a cavity having corrugated sidewalls is provided. A doped poly layer is deposited to function as the storage-node capacitor plate. The deposition of a dielectric layer is followed by an insitu-doped poly layer deposited to form the upper capacitor plate. The capacitor thus formed is typified as having the storage-node capacitor plate self-aligned to the contact area of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.