Masking technique for depositing gallium arsenide on silicon
US5256594A · kind A · utility
73Cited by
10References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 16, 1989 |
| Grant date | Oct 26, 1993 |
| Priority date | — |
| Expiry date | Jun 16, 2009 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/933
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for forming GaAs on a silicon substrate with very low levels of unintended silicon doping. First, a dielectric layer of silicon dioxide, silicon nitride, or both is grown or deposited on the substrate. Next, a window is opened in the dielectric layer exposing the silicon substrate in the regions in which the GaAs is to be formed. The GaAs layer is then formed on the substrate using conventional techniques with the gas phase transfer of silicon contamination from the edges and back of the silicon substrate to the GaAs region inhibited by the dielectric layer or layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.