Antifuse programming by transistor snap-back
US5257222A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 14, 1992 |
| Grant date | Oct 26, 1993 |
| Priority date | — |
| Expiry date | Jan 14, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention comprises a method to program antifuse elements in integrated circuits, such as programmable read-only memory (PROM) or option selections/redundancy repair on dynamic random access memories (DRAMs) by utilizing the phenomenon of transistor snap-back. Multiple programming pulses are applied to an NMOS transistor which provides access to the desired antifuse element. The first pulses applied ruptures the antifuse element causing it so become a resistive short. The second programming pulses cause the access NMOS transistor to go into snap-back thus allowing a surge of current to flow through the resistively shorted antifuse thereby lowering the resistance of the shorted antifuse element substantially allowing for less power consumption and higher reliability of the permanently programmed element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.