Refractory metal capped low resistivity metal conductor lines and vias
US5262354A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 1992 |
| Grant date | Nov 16, 1993 |
| Priority date | — |
| Expiry date | Feb 26, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/09701
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Electrically conducting vias and lines are created by a three step process. First, a controlled amount of a soft, low resistivity metal (12) is deposited in a trench or hole to a point below the top surface of the dielectric (10) in which the trench or hole is formed. Subsequently, the low resistivity metal (12) is overcoated with a hard metal (16) such as CVD tungsten. Finally, chemical-mechanical polishing is used to planarize the structure. The hard metal (16) serves the function of protecting the low resistivity metal (12) from scratches and corrosion which would ordinarily be encountered if the low resistivity metal were subjected to the harsh chemical-mechanical polishing slurries. An ideal method for partially filling trenches or holes in a substrate is by sputtering at elevated temperatures such that metallization at the bottom of a trench or hole separates from metallization on a top surface adjacent the trench or hole. An etchback procedure may also be used to separate metallization in a trench or hole from metallization adjacent a trench or hole. Trenchs and holes may also be filled by selective deposition. In addition, trenches and holes may also be lined by a metal lin…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.