Semiconductor memory having redundancy circuit with means to switch power from a normal memory block to a spare memory block
US5262993A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Nov 6, 1991 |
| Grant date | Nov 16, 1993 |
| Priority date | — |
| Expiry date | Nov 6, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/832
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a semiconductor memory, switch circuits are provided so as to inhibit voltage and signal supplies to each of the normal memory blocks when so required. On the other hand, a ROM is provided on the chip so as to store the address of a defective memory block which consumes an excessively large stand-by current when the semiconductor memory is in the stand-by mode. The switch circuits are controlled by the output of the ROM so as to inhibit the voltage and signal supply to the defective memory block. Then, a spare memory block which is substituted for the defective normal memory block receives the voltage and signal supply.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.