Method of and apparatus for inspecting wiring pattern on printed board
US5272762A · kind A · utility
5Cited by
3References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 6, 1992 |
| Grant date | Dec 21, 1993 |
| Priority date | — |
| Expiry date | Feb 6, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2207/30141
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The image of a wiring pattern provided on a printed board is obtained and binarized. A square pixel operator comprised of a matrix of pixels is applied to the pattern image. Pixel trains extending in different directions are extracted from the result of applying the square operator. The numbers of pixels having the binary value "1" on the pixel trains are counted to obtain the respective sizes of the pattern image on the pixel trains. Signals representing the respective sizes are subjected to timing adjustment operation and to obtain the width of the wiring pattern on an area larger than the square operator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.