Static RAM
US5274594A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 1992 |
| Grant date | Dec 28, 1993 |
| Priority date | — |
| Expiry date | Feb 25, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/84
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A static RAM comprises: column select circuits for connecting a plurality of pairs of corresponding complementary data lines at a unit of each pair with common complementary data lines; and redundant circuits each composed of the complementary data line pair and the column select circuit corresponding to the unit. Load MOSFETs of the complementary data lines are arranged close to the column select circuits to inhibit the column selecting operations by a decoder circuit and turn off the load MOSFETs when fuse means is cut. An access to a defective address is detected by a redundant decoder stored with the defective address, when the fuse means is selectively cut, to select the column select circuits of the redundant circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.