Fusion bonding technique for use in fabricating semiconductor devices
US5286671A · kind A · utility
132Cited by
5References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 7, 1993 |
| Grant date | Feb 15, 1994 |
| Priority date | — |
| Expiry date | May 7, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/012
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of bonding a first silicon wafer to a second silicon wafer comprises the steps of diffusing a high conductivity pattern into a surface of a first semiconductor wafer, etching a portion of the surface to raise at least a portion of the pattern, providing a second semiconductor wafer having an insulating layer of a silicon compound disposed thereon, contacting the surface of the pattern to the insulating layer, and bonding the first and second semiconductor wafers at an elevated temperature.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.