Multilayer ceramic substrate with capped vias
US5293504A · kind A · utility
13Cited by
5References
31Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 23, 1992 |
| Grant date | Mar 8, 1994 |
| Priority date | — |
| Expiry date | Sep 23, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/096
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a multilayer ceramic substrate for electronic applications including: PA1 (a) at least one internal layer having vias at least partially filled with a metallic material; PA1 (b) at least one sealing layer having vias at least partially filled with a composite material that is a mixture of ceramic and metallic materials wherein at least one via from the internal layer is aligned with at least one via from the sealing layer; and PA1 (c) a cap of material interposed between the aligned vias. Also disclosed is a method of forming the multilayer ceramic substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.