Vertical MOSFET having trench covered with multilayer gate film
US5321289A · kind A · utility
110Cited by
3References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 21, 1993 |
| Grant date | Jun 14, 1994 |
| Priority date | — |
| Expiry date | Oct 21, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/681
Abstract
A vertical MOSFET includes a trench whose inner surface is covered with an insulating layer having a multilayer structure. In order to reduce a change in a gate threshold voltage, and equivalent silicon dioxide thickness of the gate insulating layer and a radius of curvature of an upper corner of the trench are provided such that a dielectric breakdown electric field strength of the gate insulating layer at the upper corner is in the range of 2.5 MV/cm to 5.0 MV/cm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.