Method of making multilayered circuit board
US5359767A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 1993 |
| Grant date | Nov 1, 1994 |
| Priority date | — |
| Expiry date | Aug 26, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of making a multilayered circuit board wherein at least two layered subassemblies, each comprising a dielectric layer and at least one conductive layer therein, are bonded together. Each subassembly includes a through-hole extending therethrough which is aligned with a respective through-hole of the other prior to bonding. The subassemblies are compressed at a predetermined pressure (e.g., 300 psi) and then heated to a first temperature (e.g., 300.degree. C.) for an established time period, resulting in formation of a bond between the two through-holes. The resulting alloy formed from this bond possesses a melting point significantly greater than that of the subassembly dielectric (e.g., PTFE). Following this time period, the compressed subassemblies are heated to an even greater temperature (e.g., 380.degree. C.), again for an established time period, to assure dielectric flow. The subassembly is then cooled and the pressure removed. The method possesses two significant features: (1) effective engagement between respective pairs of through-holes in the compressed subassemblies; and (2) prevention of dielectric incursion within the bond formed between the respective pairs …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.