Method of making a flash EPROM device utilizing a single masking step for etching and implanting source regions within the EPROM core and redundancy areas

US5376573A · kind A · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Robert B. Richart · Austin, US
• Shyam Garg · Austin, US
• Fei Wang · San Jose, US

Key dates

• Filing date: Dec 10, 1993
• Grant date: Dec 27, 1994
• Expiry date: Dec 10, 2013

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B69/00

Abstract

A flash EPROM device is provided for programmably storing digital data within a core array of electrically programmable transistors. A row or column within the array can be substituted for a spare or redundant row or column selectively connected to row or column decoder circuits by a redundancy select transistor. Self-aligned source regions within the array and redundancy select area are provided using a single mask for opening the self-aligned source regions and for implanting a light dosage of phosphorus directly into the underlying silicon substrate. Careful control and elimination of residue within the etched area via a subsequent wet etch helps ensure the implant edges are anisotropically controlled and isolated for subsequent lateral diffusion/drive-in. Accordingly, the flash EPROM device of a plurality of transistors within the array and within the redundancy select area are process controlled and demonstrate a significant reduction in threshold skewing. A result being an array of electrically programmable transistors which read, write and erase at substantially the same threshold level for each transistor.