Distributed negative gate power supply
US5406517A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 1993 |
| Grant date | Apr 11, 1995 |
| Priority date | — |
| Expiry date | Aug 23, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A distributed negative gate power supply for generating and selectively supplying a relatively high negative voltage to control gates of memory cells in selected half-sectors via wordlines in an array of flash EEPROM memory cells during flash erasure. The distributed negative gate power supply includes a main charge pumping circuit (20a, 20b), a plurality of distribution sector pumping means (18a-18p). Each of the plurality of distribution sector pumping circuits is responsive to a half-sector select signal for selectively connecting the primary negative voltage to the wordlines of the selected half-sectors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.