DMOS power transistors with reduced number of contacts using integrated body-source connections

US5410170A · kind A · utility

Assignee

• SILICONIX INCORPORATED · US

Inventors

• Constantin Bulucea · Milpitas, US
• Rebecca Rossen · Palo Alto, US

Key dates

• Filing date: Apr 14, 1993
• Grant date: Apr 25, 1995
• Expiry date: Apr 14, 2013

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/66

Abstract

Two topologically different cells are disclosed that reduce the total number of contacts per device and that are applicable to mid- to high-voltage DMOS transistors. These cells use integrated connections between the source and the body that make them less sensitive to contact obturations by particle contamination or lithography imperfections. The topologies include either an elongated hexagonal cell or a buried-deep-body cell. Both cells are most efficient in high-current medium-voltage trench DMOS transistors, where the density of body contacts becomes prohibitive while the perimeter/area geometry factor is less critical. The disclosed embodiments are of the trench type of DMOS construction. The cells may, however, be implemented in planar DMOS transistors as well.