Electrically erasable memory elements having improved set resistance stability
US5414271A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 7, 1991 |
| Grant date | May 9, 1995 |
| Priority date | — |
| Expiry date | Nov 7, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/72
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A solid state, directly overwritable, electronic, non-volatile, high density, low cost, low energy, high speed, readily manufacturable, multibit single cell memory or control array based upon the novel switching characteristics provided by said unique class of semiconductor materials characterized by a large dynamic range of reversible Fermi level positions. The memory or control elements from which the array is fabricated exhibit orders of magnitude higher switching speeds at remarkably reduced energy levels. The novel memory elements of the instant invention are in turn characterized, inter alia, by numerous stable and non-volatile detectable configurations of local atomic and/or electrode order, which configurations can be selectively and repeatably accessed by electric input signals of yawing energy level. The memory elements are further characterized by enhanced stability, which stability is achieved through the use of compositional modulation of the semiconductor material from which the memory elements are fabricated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.