Method of making an electronic package assembly with protective encapsulant material
US5414928A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 1993 |
| Grant date | May 16, 1995 |
| Priority date | — |
| Expiry date | Apr 2, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49146
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An electronic package assembly wherein a low profile package is soldered to an organic (e.g., epoxy resin) substrate (e.g., printed circuit board), the projecting conductive leads of the package and the solder which substantially covers these leads (and respective conductors on the substrate) having been substantially covered with encapsulant material (e.g., polymer resin) to provide reinforcement for the solder-lead connections. The encapsulant material is dispensed about the solder and lead joints following solder reflow and solidification so as to substantially surround the solder and any portions of the leads not covered with solder. The invention has particular useful with thin, small outline package (TSOP) structures which occupy a minimum of height on the substrate surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.