Method of enhancing the current gain of bipolar junction transistors
US5420050A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 1993 |
| Grant date | May 30, 1995 |
| Priority date | — |
| Expiry date | Dec 20, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/124
Abstract
The present invention teaches a method and structure of enhancing the current gain characteristics of a bipolar junction transistor. The method comprises the step of forming a patterned silicon dioxide layer superjacent a semiconductor substrate comprising a base, an emitter and a collector, such that a carrier current conducts between the base and the emitter. The silicon dioxide layer forms an interface on the substrate at the emitter. Further, a first polysilicon layer is formed superjacent both the patterned silicon dioxide layer and the interface, and is implanted with O.sub.2. Subsequently, the substrate is heated such that the emitter interface is obstructed by a silicon dioxide formation, thereby blocking a portion of carrier current from passing through the interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.