Method and apparatus for testing of integrated circuit chips
US5420520A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 11, 1993 |
| Grant date | May 30, 1995 |
| Priority date | — |
| Expiry date | Jun 11, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2879
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method of testing semi-conductor chips is disclosed. The individual semiconductor chips have I/O, power, and ground contacts. In the method of the invention a chip test fixture system is provided. The chip test fixture system has contacts corresponding to the contacts on the semiconductor chip. The carrier contacts have dendritic surfaces. The chip contacts are brought into electrically conductive contact with the conductor pads on the chip test fixture system. Test signal input vectors are applied to the inputs of the semiconductor chip, and output signal vectors are recovered from the semiconductor chip. After testing the chip is removed from the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.