Method of manufacturing semiconductor device with copper core bumps
US5433822A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 1992 |
| Grant date | Jul 18, 1995 |
| Priority date | — |
| Expiry date | Dec 22, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1476
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has circuit patterns formed on upper and lower surfaces of a laminated board with both surfaces lined with copper and interconnected by through holes, an IC chip mounted on the upper pattern, and external connection terminals mounted on the lower pattern, the external connection terminals comprising copper core bumps. According to a method of manufacturing such a semiconductor device, the same etching process as pattern etching for forming the circuit pattern are effected in bump forming regions on the circuit pattern formed by the resist pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.