VDMOS transistor and manufacturing method therefor
US5442214A · kind A · utility
127Cited by
1References
5Claims
0Family size
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Key dates
| Filing date | Oct 28, 1994 |
| Grant date | Aug 15, 1995 |
| Priority date | — |
| Expiry date | Oct 28, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/126
Abstract
A VDMOS transistor having a reduced drain/source resistance without a corresponding decrease in breakdown voltage and a manufacturing method therefor. Such a VDMOS transistor is created by gradually increasing the doping density of the transistor's implanted regions, while simultaneously increasing the respective thicknesses of the gate oxide layers corresponding to the implanted regions along the current flow path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.