Method of fabricating a short-channel DMOS transistor with removable sidewall spacers
US5444002A · kind A · utility
8Cited by
4References
2Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 22, 1993 |
| Grant date | Aug 22, 1995 |
| Priority date | — |
| Expiry date | Dec 22, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
Abstract
The present invention relates to a method of forming a double diffused metal-oxide-semiconductor (DMOS) transistor which enables the formation of short channels. This method uses silicon nitride sidewall spacers so that the sidewall spacers can be removed without etching the field oxide, therefore the length of the channel can be minimized to reduce the channel resistance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.