Method for interconnection of integrated circuit chip and substrate
US5478007A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 11, 1994 |
| Grant date | Dec 26, 1995 |
| Priority date | — |
| Expiry date | May 11, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49144
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to the invention, a method and structure for flip chip interconnection of an integrated circuit chip to a substrate is provided. The method and structure of the invention overcome the problems associated with interconnecting the chip to the substrate by wirebonding and are less expensive than prior art flip chip interconnection methods and structures. Conventional integrated circuit chips that have been made using wafer fabrication processes for wirebonding chip-level interconnection are electrically connected to a substrate using a flip chip interconnection. Conventional wirebonding equipment can be used to bump chips for use in the invention. In one embodiment of the invention, an integrated circuit includes a semiconductor die mounted on a substrate such that electrically conductive material formed on each of the bond pads of the semiconductor die extends through a corresponding well formed in a dielectric layer on the substrate to contact electrically conductive material formed in the surface of the substrate on which the dielectric layer is situated. In another embodiment of the invention, the electrically conductive material is a coined ball bond, which can have, fo…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.