Method for eliminating of cycling-induced electron trapping in the tunneling oxide of 5 volt only flash EEPROMS
US5485423A · kind A · utility
52Cited by
3References
10Claims
0Family size
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Key dates
| Filing date | Oct 11, 1994 |
| Grant date | Jan 16, 1996 |
| Priority date | — |
| Expiry date | Oct 11, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is provided an improved method for eliminating of cycling-induced electron trapping in the tunneling oxide of flash EEPROM devices. A relatively low positive pulse voltage is applied to a source region of the EEPROM devices during an entire erase cycle. Simultaneously, a negative ramp voltage is applied to a control gate of the EEPROM devices during the entire erase cycle so as to accomplish an averaging tunneling field from the beginning of the erase cycle to the end of the erase cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.