Memory integrated circuits having on-chip topology logic driver, and methods for testing and producing such memory integrated circuits
US5488583A · kind A · utility
34Cited by
2References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 22, 1994 |
| Grant date | Jan 30, 1996 |
| Priority date | — |
| Expiry date | Sep 22, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory integrated circuit chip of a predefined circuit topology has an on-chip topology logic driver. The topology logic driver selectively inverts data being written to and read from addressed memory cells in the memory IC based upon location of the addressed memory cells in the circuit topology of the memory array. The topology logic driver is preferably a logic circuit that embodies a boolean function defining the circuit topology. A method for testing and producing such memory ICs is also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.