Method for fabricating gate oxide layers of different thicknesses
US5502009A · kind A · utility
84Cited by
2References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 16, 1995 |
| Grant date | Mar 26, 1996 |
| Priority date | — |
| Expiry date | Feb 16, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/981
Abstract
A method for fabricating gate oxide layers of different thicknesses on a silicon substrate. A field oxide layer is formed on a predetermined portion of the silicon substrate to define first active regions and second active regions. A first gate oxide layer is formed over the first and second active regions. A barrier layer is formed to cover a portion of the first gate oxide layer within the first active regions. The portion of the first gate oxide layer within the second active regions is then removed utilizing the barrier layer as masking. A second gate oxide layer is then formed over the second active regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.