Circuit for delaying data latching from a precharged bus and method
US5502414A · kind A · utility
5Cited by
21References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 13, 1995 |
| Grant date | Mar 26, 1996 |
| Priority date | — |
| Expiry date | Apr 13, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An latch circuit includes an input line receiving electrical signals from a bus, a latch for conducting electrical signals from the precharged bus to a receiving circuit, and a structure for enabling the latch only when data is driven onto the bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.