Pseudo-nonvolatile memory incorporating data refresh operation
US5511020A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 23, 1993 |
| Grant date | Apr 23, 1996 |
| Priority date | — |
| Expiry date | Nov 23, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A pseudo nonvolatile memory cell which may be operated in a pseudo-nonvolatile mode is achieved by utilizing a thin direct tunneling dielectric adjacent to the charge retaining region in a traditional nonvolatile memory cell such as an EPROM, EEPROM, flash EPROM, or flash EEPROM cell. The use of the direct tunneling dielectric allows for greatly enhanced write/erase cycles (exceeding 100 gigacycles) and reduced data write/erase time (under 1 microsecond). The direct tunneling dielectric also results in a reduced data retention period. Consequently, refresh circuitry is provided to maintain the non-volatility of the memory cell. A back-up battery is used to power the refresh circuitry when the system power is removed. This mode of operation provides an effectively nonvolatile memory system that is suitable for replacing traditional nonvolatile memory devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.