Boosted and regulated gate power supply with reference tracking for multi-density and low voltage supply memories
US5511026A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 1, 1993 |
| Grant date | Apr 23, 1996 |
| Priority date | — |
| Expiry date | Dec 1, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A gate power supply for supplying power to the gates of flash EEPROM memory cells in a multi-density or low voltage supply memory array to determine the states stored by the memory cells. The gate power supply includes a multi-phase voltage pump to increase voltage supplied to the gates of the memory cells above a system voltage supply, V.sub.CC to increase the working margin between memory cell states. The gate power supply further includes a low power supply standby pump to maintain the boosted voltage during an inactive mode. The wordline decoder for the memory is divided into sections with a large n-well parasitic capacitance of each decoder section acting as a reservoir to store the charge supplied by the low power standby pump. In an active mode, the parasitic capacitance in unselected decoder sections supplies power to the input of the selected diecoder section while the multi-phase pump is turning on. Zener regulation diodes are coupled to the inputs of each decoder section to regulate the voltage supplied to each section. A reference supply feeds back power from the input of the selected decoder section to the input of a reference array. The reference supply further provid…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.