Process for forming a butting contact through a gate electrode
US5521113A · kind A · utility
14Cited by
2References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 16, 1995 |
| Grant date | May 28, 1996 |
| Priority date | — |
| Expiry date | Mar 16, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/02
Abstract
An SRAM cell includes a semiconductor substrate doped with a dopant of a first type, a highly doped region in the substrate implanted with a dopant of opposite type, a gate oxide layer on the substrate, a first conductive layer formed upon the gate oxide layer, a dielectric layer deposited over the first conductive layer, an opening in the gate oxide layer, the first conductive layer, and the dielectric layer, and a second conductive layer deposited upon the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.