Method for determining instance placements in circuit layouts
US5521836A · kind A · utility
29Cited by
4References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 12, 1994 |
| Grant date | May 28, 1996 |
| Priority date | — |
| Expiry date | Dec 12, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/392
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A process for producing placement information for layouts of circuit elements of networks that are initially represented by netlists such that datapaths can be advantageously placed into a regular array. In one preferred embodiment, the method includes steps of encoding datapath information in instance names of a netlist generated by a datapath compiler; using the encoded datapath information for defining partitioned areas that preserve datapaths; and generating circuit layouts from the netlist, which layouts contain floor plans of the datapaths.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.