Apparatus and method for testing an integrated circuit using a voltage reference potential and a reference integrated circuit
US5528603A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 1995 |
| Grant date | Jun 18, 1996 |
| Priority date | — |
| Expiry date | May 1, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/88
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit testing apparatus and method of testing. In a first embodiment an amplifier amplifies the difference in a reference integrated circuit (RIC) response and a device under test integrated circuit (DUTIC) response to an electrical stimulus. The electrical stimulus is provided at an input of the DUTIC and the RIC by a stimulus circuit. A analog comparator determines when the amplified differences exceeds an adjustable threshold value. The sensitivity of the comparator is adjustable and the desired threshold value is adjusted before testing begins. If the amplified difference exceeds the threshold value of the comparator an error signal is generated. The apparatus of the invention includes a presetable counter which generates a device fail signal if a predetermined number of error signals are generated by the comparator. An initialization circuit loads a selectable value into the counter to provide a variable number of allowable errors before a DUTIC fails the test. In a second embodiment a precision voltage reference potential is adjusted to select a desired minimum potential for a high logic signal and a desired maximum potential for a low logic signal. The integr…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.