Large scale IC personalization method employing air dielectric structure for extended conductor
US5530290A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 11, 1994 |
| Grant date | Jun 25, 1996 |
| Priority date | — |
| Expiry date | Apr 11, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Fabrication methods for forming a network of walls concurrently with the formation of studs for interconnecting plural device layers of a large scale integrated circuit device permits aggressive reduction of the average dielectric constant of air dielectric structures. Wall sections may be positioned to laterally support high aspect ratio connecting studs with a network of open or closed polygons. Wall patterns may also be open from layer to layer to allow formation of large scale air dielectric structures over a plurality of layers in a single material removal step. A wide range of shear strengths and reductions of average dielectric constant can be achieved even within a single device layer of a large scale integrated circuit and exploited to meet circuit design and device fabrication process requirements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.