System and method for error correction code generation
US5533189A · kind A · utility
13Cited by
8References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 28, 1994 |
| Grant date | Jul 2, 1996 |
| Priority date | — |
| Expiry date | Nov 28, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1064
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Error correction code ("CECC") generation within a directory or memory controller is distributed between generation of an ECC for the tag and status portions of a directory entry and then summed to produce the ECC bits for the directory entry. The ECC generation may be performed for entries with respect to a cache for a uniprocessor or multiprocessor system or for system memory within such a data processing system. The ECC generation of the present invention reduces by one or more cycles the required time utilized for updating a directory entry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.