Self-aligned charge screen (SACS) field effect transistors and methods
US5536959A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 9, 1994 |
| Grant date | Jul 16, 1996 |
| Priority date | — |
| Expiry date | Sep 9, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
Abstract
A field effect transistor includes a pair of buried centroid regions in a semiconductor substrate at a predetermined depth from the substrate face and having a doping concentration opposite the source and drain regions. A gradient region surrounds each of the pair of buried centroid regions. The gradient regions have decreasing doping concentration in all directions away from the associated centroid region. Source and drain extension regions may also be provided. The buried centroid/gradient regions operate to screen charge on the source and drain regions facing the channel to prevent this charge from interacting with the channel. Short channel effects are thereby reduced or minimized. The threshold voltage of the device can also be adjusted without the need for threshold adjusting implants. The buried centroid/gradient regions and source and drain extension regions may be fabricated in a self-aligned process using the gate and gate sidewall spacers as a mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.