Insulated gate semiconductor device and method of manufacture

US5541132A · kind A · utility

Assignee

• Motorola, Inc. · US

Inventors

• Robert B. Davies · Tempe, US
• Vida Ilderem · Phoenix, US
• Mark Griswold · Chandler, US
• Diann Dow · Chandler, US
• James E. Prendergast · Phoenix, US
• Iksung Lim · Tempe, US
• Juan Buxo · Tempe, US
• Richard D. Sivan · Austin, US
• James D. Burnett · Austin, US
• Frank K. Baker, Jr. · Austin, US

Key dates

• Filing date: Mar 21, 1995
• Grant date: Jul 30, 1996
• Expiry date: Mar 21, 2015

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/981

Abstract

An insulated gate field effect transistor (10) having an reduced gate to drain capacitance and a method of manufacturing the field effect transistor (10). A dopant well (13) is formed in a semiconductor material (11). A gate oxide layer (26) is formed on the dopant well (13) wherein the gate oxide layer (26) and a gate structure (41) having a gate contact portion (43) and a gate extension portion (44). The gate contact portion (43) permits electrical contact to the gate structure (41), whereas the gate extension portion (44) serves as the active gate portion. A portion of the gate oxide (26) adjacent the gate contact portion (43) is thickened to lower a gate to drain capacitance of the field effect transistor (10) and thereby increase a bandwidth of the insulated gate field effect transistor (10).