Patent · US Expired

High energy buried layer implant to provide a low resistance p-well in a flash EPROM array

US5541875A · kind A · utility

11Cited by
1References
7Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 1, 1994
Grant dateJul 30, 1996
Priority date
Expiry dateJul 1, 2014

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B69/00

Abstract

A buried layer which is highly doped and implanted with high energy in a lightly doped isolated well in which an array of flash EPROM cells are provided. The buried layer is doped with the same conductivity dopant as the well in which it is provided, for example a p.sup.+ -type buried implant is provided in a p-type well. The buried layer enables channel size of the flash EPROM cells to be reduced providing a higher array density. Channels of the flash EPROM cells are reduced because the buried layer provides a low resistance path between channels of the flash EPROM cells enabling erase to be performed by applying a voltage potential difference between the gate and substrate of a cell.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.