Method of construction for multi-tiered cavities used in laminate carriers
US5566448A · kind A · utility
19Cited by
11References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 6, 1995 |
| Grant date | Oct 22, 1996 |
| Priority date | — |
| Expiry date | Jun 6, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming an I/C chip mounting module, and for mounting an I/C chip thereon, is disclosed. A rigid cap and substrate are provided. A bottomed cavity is routed in the cap, and the substrate has circuitry formed thereon. The cap and substrate are laminated together with bond pads, which connect to the circuitry being disposed in the cavity. After circuitization of the exposed surface of the cap and drilling and plating of vias, the material of the cap overlying the cavity is removed to expose the bond pads. Thereafter, an I/C chip is connect to the pads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.