Separation of wafer into die with wafer-level processing
US5597767A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 6, 1995 |
| Grant date | Jan 28, 1997 |
| Priority date | — |
| Expiry date | Jan 6, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/028
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method of separating wafers, such as those used for semiconductor device manufacture, into die. A partly fabricated wafer is covered with a protective coating over its top surface (10). The wafer is then inscribed to define separation lines between die, with the separation lines being of a predetermined depth (12). The protective coating is then removed (14), and at least one processing step is performed at the wafer level (15, 22-24), before the inscribed wafer is separated into die. Then, the wafer is separated into die along the separation lines (17).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.