Array of configurable logic blocks including network means for broadcasting clock signals to different pluralities of logic blocks
US5598346A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 5, 1996 |
| Grant date | Jan 28, 1997 |
| Priority date | — |
| Expiry date | Feb 5, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17744
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable integrated circuit includes configurable logic blocks (CLB's), configurable input/output blocks (IOB's) and a configurable interconnect network for providing program-defined routing of signals between the CLB's and IOB's. Each CLB includes an internal clock selector for selecting a CLB-internal clock and at least one register that is responsive to the selected CLB-internal clock. The configurable interconnect network includes clock-carrying longlines extending in different directions past each CLB for broadcasting clock signals. The broadcast clock signals can originate outside the programmable integrated circuit or such broadcast clock signals can be generated within one or more of the CLB's and thereafter broadcast by way of the clock broadcasting longlines to others of the CLB's.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.