Method of making a dual damascene antifuse structure
US5602053A · kind A · utility
71Cited by
16References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 8, 1996 |
| Grant date | Feb 11, 1997 |
| Priority date | — |
| Expiry date | Apr 8, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An improved antifuse design has been achieved by providing a structure includes a pair of alternating layers of silicon nitride and amorphous silicon sandwiched between two dual damascene connectors. Said structure provides the advantage, over the prior art, that all electrically active surfaces of the fuse structure are planar, so no potential failure spots resulting from surface unevenness can be formed. A process for manufacturing said fuse structure is also provided and involves fewer masking steps than related structures of the prior art.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.