Inventor · Anaheim, CA, US

Lap Chan

21Patents
13h-index
24Co-inventors
81Inventor score

Filing activity: Dec 4, 1995 → Aug 20, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US5728621A Method for shallow trench isolation Electricity 112 Expired
US5731239A Method of making self-aligned silicide narrow gate electrodes for field effect transistors having low sheet resistance Electricity 109 Expired
US5744376A Method of manufacturing copper interconnect with top barrier layer Electricity 90 Expired
US5710070A Application of titanium nitride and tungsten nitride thin film resistor for thermal ink jet technology Performing Operations; Transporting 81 Expired
US5610083A Method of making back gate contact for silicon on insulator technology Electricity 71 Expired
US5602053A Method of making a dual damascene antifuse structure Electricity 71 Expired
US5618384A Method for forming residue free patterned conductor layers upon high step height integrated circuit substrates using reflow of photoresist Electricity 47 Expired
US5705849A Antifuse structure and method for manufacturing it Electricity 36 Expired
US5627094A Stacked container capacitor using chemical mechanical polishing Electricity 33 Expired
US5677238A Semiconductor contact metallization Electricity 18 Expired
US5900672A Barrier layer Electricity 18 Expired
US5808855A Stacked container capacitor using chemical mechanical polishing Electricity 17 Expired
US6777774B2 Low noise inductor using electrically floating high resistive and grounded low resistive patterned shield Electricity 13 Expired
US5652152A Process having high tolerance to buried contact mask misalignment by using a PSG spacer Electricity 12 Expired
US6188135A Copper interconnect with top barrier layer Electricity 11 Expired
US5624871A Method for making electrical local interconnects Emerging Cross-Sectional Technologies 10 Expired
US5792708A Method for forming residue free patterned polysilicon layers upon high step height integrated circuit substrates Electricity 9 Expired
US5742088A Process having high tolerance to buried contact mask misalignment by using a PSG spacer Electricity 9 Expired
US5693178A Electrical test structure to quantify microloading after plasma dry etching of metal film Electricity 2 Expired
US6307248A Definition of anti-fuse cell for programmable gate array application Emerging Cross-Sectional Technologies 0 Expired
US11448373B1 Photosensitive candle Mechanical Engineering; Lighting; Heating 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.