Self-masking FIB milling
US5616921A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 1994 |
| Grant date | Apr 1, 1997 |
| Priority date | — |
| Expiry date | Jun 30, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/31742
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Preferential etching during FIB milling can result in a rough, pitted surface and make IC probing/repair operations difficult. Preferential etching is compensated by acquiring a contrast image of the partially-milled sample, preparing mask image data from the contrast image, and controlling further FIB milling using the mask image data. For example, a window is to be milled in a top-layer power plane of an IC to expose a hidden layer. The window is partially milled. A FIB image is acquired and thresholded to produce mask image data. The mask image data distinguish areas where the power plane has been milled through from those where it has not been milled through. Milling is resumed using the mask image data to control effective FIB milling current. The mask image data are updated periodically as the window is milled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.