Method for making electrical local interconnects
US5624871A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 19, 1996 |
| Grant date | Apr 29, 1997 |
| Priority date | — |
| Expiry date | Aug 19, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/934
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for producing an interconnect on a semiconductor device has silicon containing conductive surfaces and dielectric surfaces. The process includes forming separate regions of a blanket first refractory metal silicide on the silicon containing conductive surfaces, the first refractory metal silicide being composed of a first refractory metal and silicon from the surfaces, forming a blanket second refractory metal layer over the device, forming a blanket .alpha.-Si layer over the second refractory metal layer, forming a mask over the device to pattern an interconnect between the separate regions, then etching away the unwanted portions of the refractory metal layers and the .alpha.-Si layer, performing a rapid thermal annealing process on the device forming a low resistance refractory metal silicide between the .alpha.-Si layer and the second refractory metal layer, and then etching away the unwanted portions of the refractory metal layers that are not covered by the refractory metal silicide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.