Chip mounting plate construction of lead frame for semiconductor package
US5661338A · kind A · utility
34Cited by
7References
7Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Dec 12, 1995 |
| Grant date | Aug 26, 1997 |
| Priority date | — |
| Expiry date | Dec 12, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip mounting plate construction of lead frames for semiconductor packages which provides a chip mounting plate having a greatly reduced area to obtain a small bonding area between the chip mounting plate and a semiconductor chip mounted on the chip mounting plate, thereby capable of minimizing thermal strain generated at the chip mounting plate due to a thermal expansion thereof. The chip mounting plate is constructed to have a smaller area than the semiconductor chip, to have a central opening, or to have recesses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.