Method of fabricating a self-aligned contact trench DMOS transistor structure
US5665619A · kind A · utility
114Cited by
4References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 13, 1996 |
| Grant date | Sep 9, 1997 |
| Priority date | — |
| Expiry date | May 13, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/62
Abstract
A trench DMOS transistor structure includes a contact to the transistor's source and body that is self-aligned to the trench. With a self-aligned contact, the distance from the edge of the source and body contact to the edge of the trench can be minimized. Thus, the distance between the trench edges can be reduced. As a result, the packing density of the transistor is increased dramatically. This gives rise to much improved performance in terms of low m-resistance and higher current drive capability. Alternate process modules are provided for fabricating the self-aligned contact structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.