Processing techniques for achieving production-worthy, low dielectric, low dielectric, low interconnect resistance and high performance IC
US5679608A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 1995 |
| Grant date | Oct 21, 1997 |
| Priority date | — |
| Expiry date | Jun 5, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/951
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The interconnects in a semiconductor device contacting metal lines includes a low resistance metal, such as copper, gold, silver, or platinum, and are separated by a material having a low dielectric constant, such as benzocyclobutene or a derivative thereof. A tri-layer resist structure is used, together with a lift-off process, to form the interconnects. The low dielectric constant material provides a diffusion barrier to the diffusion of the low resistance metal. The tri-layer resist includes a first layer of a dissolvable polymer, a second layer of a hard mask material, and a third layer of a resist material. The resulting structure provides an integrated circuit with increased speed and ease of fabrication.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.