Robin Cheung
102Patents
33h-index
88Co-inventors
93Inventor score
Filing activity: Mar 1, 1984 → Dec 23, 2018
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6136163A | Apparatus for electro-chemical deposition with thermal anneal chamber | Electricity | 440 | Expired |
| US6258220A | Electro-chemical deposition system | Electricity | 333 | Expired |
| US6258223A | In-situ electroless copper seed layer enhancement in an electroplating system | Electricity | 310 | Expired |
| US5635423A | Simplified dual damascene process for multi-level metallization and interconnection structure | Electricity | 287 | Expired |
| US6245670A | Method for filling a dual damascene opening having high aspect ratio to minimize electromigration failure | Electricity | 246 | Expired |
| US6645550B1 | Method of treating a substrate | Emerging Cross-Sectional Technologies | 239 | Expired |
| US5972192A | Pulse electroplating copper or copper alloys | Chemistry; Metallurgy | 225 | Expired |
| US6259160A | Apparatus and method of encapsulated copper (Cu) Interconnect formation | Electricity | 116 | Expired |
| US5679608A | Processing techniques for achieving production-worthy, low dielectric, low dielectric, low interconnect resistance and high performance IC | Emerging Cross-Sectional Technologies | 115 | Expired |
| US5968333A | Method of electroplating a copper or copper alloy interconnect | Electricity | 112 | Expired |
| US5550405A | Processing techniques for achieving production-worthy, low dielectric, low interconnect resistance and high performance ICS | Emerging Cross-Sectional Technologies | 103 | Expired |
| US5559055A | Method of decreased interlayer dielectric constant in a multilayer interconnect structure to increase device speed performance | Emerging Cross-Sectional Technologies | 102 | Expired |
| US5654589A | Landing pad technology doubled up as local interconnect and borderless contact for deep sub-half micrometer IC application | Emerging Cross-Sectional Technologies | 71 | Expired |
| US5534731A | Layered low dielectric constant technology | Electricity | 69 | Expired |
| US5670828A | Tunneling technology for reducing intra-conductive layer capacitance | Electricity | 63 | Expired |
| US6056864A | Electropolishing copper film to enhance CMP throughput | Electricity | 56 | Expired |
| US6436267B1 | Method for achieving copper fill of high aspect ratio interconnect features | Electricity | 52 | Expired |
| US5674781A | Landing pad technology doubled up as a local interconnect and borderless contact for deep sub-half micrometer IC application | Emerging Cross-Sectional Technologies | 52 | Expired |
| US5970370A | Manufacturing capping layer for the fabrication of cobalt salicide structures | Emerging Cross-Sectional Technologies | 50 | Expired |
| US7742323B2 | Continuous plane of thin-film materials for a two-terminal cross-point memory | Emerging Cross-Sectional Technologies | 50 | Active |
| US6153523A | Method of forming high density capping layers for copper interconnects with improved adhesion | Electricity | 48 | Expired |
| US4727045A | Plugged poly silicon resistor load for static random access memory cells | Emerging Cross-Sectional Technologies | 45 | Expired |
| US6153521A | Metallized interconnection structure and method of making the same | Electricity | 44 | Expired |
| US5785236A | Advanced copper interconnect system that is compatible with existing IC wire bonding technology | Emerging Cross-Sectional Technologies | 43 | Expired |
| US5451545A | Process for forming stable local interconnect/active area silicide structure VLSI applications | Emerging Cross-Sectional Technologies | 41 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.